Computers are programmed with programming languages.
These languages are generally human-readable and allow the programmer to configure what the computer does.
This code then needs to be compiled into computer instructions.
The exact details of this vary depending on the Instruction Set Architecture or ISA the intended computer uses.
The ISA of x86 and ARM is different; the software must be compiled separately.
However, a clever part that is pretty well hidden is micro-operations.
This specifically refers to how much data they take to represent.
In x86, an instruction can be as short as one byte or as long as 15.
Compare this to the standard RISC-V architecture used by modern ARM CPUs with fixed-length 4-byte instructions.
Tip:RISC stands for Reduced Instruction Set Computing.
Each instruction has multiple stages to its operation that utilize different hardware.
Pipelining runs multiple instructions through these stages simultaneously, with precisely one instruction in each stage.
Pipelining offers a considerable performance boost when used efficiently.
One key factor in efficiently utilizing a pipeline is ensuring that each stage is used simultaneously.
This keeps everything running through the pipeline smoothly.
In a CISC, however, like x86, some instructions can take much longer to complete than others.
This creates a big efficiency issue when pipelining a CPU.
Every time a longer instruction comes along, it gets stuck in the pipeline for longer.
This causes a bubble and holds up everything behind it.
Micro-operations are the solution to this.
Each operation can be split into many micro-operations.
By designing the micro-operations carefully, you’re able to optimize the pipeline.
Interestingly, this offers a new advantage.
In modern CPU design, a micro-operation is added to a reorder buffer.
Its this buffer that the CPU can perform its efficiency-oriented reordering.
Its micro-operations, not actual instructions, that are reordered.
In some cases, especially with more advanced CPUs, even more, can be done.
Micro-op fusion is where multiple micro-operations are combined into one.
By reducing the number of micro-operations performed, the process can complete faster.
This also reduces the number of state changes reducing power consumption.
Full instructions may even be analyzed and combined into more efficient micro-operation structures.
Some CPUs make use of a micro-operation cache.
This stores fully decoded micro-operation sequences that can be reused if called again.
Conclusion
A micro-operation is a CPU-specific implementation of an instruction set.
Instructions are decoded to a series of micro-operations.
These micro-operations are significantly easier to pipeline more efficiently and thus make better use of CPU resources.
Micro-operations are often shortened to micro-ops or even ops.
That uses the Greek letter (pronounced Mu), the SI symbol for the micro prefix.