Modern computers are highly complex machines.
No part, however, is more complicated than the CPU.
Often at the cutting edge of what is possible to manufacture in bulk.
All this makes CPUs extremely complex.
Gone are the sequential days where an instruction is processed to completion before the next one is started.
This complexity means a lot of complex management is needed to keep it all working as intended.
The control unit performs this management.
The control unit is responsible for ensuring that all instructions get executed.
Thanks to high-speed cache memory, this often doesnt take too long.
During this time, the control unit could stall the pipeline, waiting for the data to be available.
When the data is available, that instruction then needs to be resumed.
This happens through the use of an interruption.
An interrupt pauses the pipeline and inserts the waiting instruction and its data, ready for execution.
Out-of-Order Execution
Most modern CPUs are now out-of-order processors.
Rather than executing instructions in order, even allowing for the pipeline, they have a reorder buffer.
Out-of-order processing is highly complex.
Branch Prediction and Speculative Execution
One of the significant issues with pipelined computers comes from conditional branches.
A branch is a part of code, such as an IF statement.
In one branch, that if statement is true; in the other, it is false.
The problem is that you only determine which branch to take at the execution stage.
So, what do you do?
You could stall the pipeline whenever a branch is encountered.
This would always lead to performance loss, though.
Another option would be to start performing both outcomes and then drop the wrong one.
This approach would have half of the performance loss but would still have that performance loss.
The final option is performing branch prediction and speculatively executing your predicted branch.
Performance relating to branch prediction and speculative execution is based on the success rate of the prediction algorithm.
One way this can be partially managed is with out-of-order execution.
It ensures that each instruction has the data it needs available.
If an instruction needs to be delayed, it manages the interrupt process that resumes that instruction.
It manages the instruction reordering process needed for out-of-order execution and performs branch prediction.
